Low-power wake-up receiver

Tuesday, 30 March, 2010


Imec and Holst Centre have reported a 2.4 GHz/915 MHz wake-up receiver which consumes 51 µW. This may open the door to batteryless or energy-harvesting based radios for a wide range of applications, including long-range RFID and wireless sensor nodes for logistics, smart buildings, healthcare etc.

Today’s battery-operated wireless communication systems consume a lot of power while on stand-by. The wake-up receiver can be put in parallel with the conventional radio to switch it on when data needs to be received or transmitted.

The developers have produced a radio architecture based on double sampling to overcome noise problems. Noise affects most low data rate (10-100 kbps) radios. As a consequence, these radios traditionally have a higher power budget than higher data rate radios achieving the same performance.

By using a double-sampling technique the offset and noise is reduced and the sensitivity of the receiver improves.

The wake-up receiver chip was implemented in a 90 nm digital CMOS. Measurements on silicon show a sensitivity of -75 dBm (SNR>12 dB) for the 915 MHz receiver at 100 kbps on-off keying modulation. When scaling the data rate to 10 kbps and filtering the out-of-band noise, the sensitivity is improved by 5 dB. For the 2.4 GHz receiver, the sensitivity is -64 dBm and -69 dBm for 100 kbps and 10 kbps.

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