45-nanometre chips promise ultra-fast Wi-Fi

Radio technologies that promise blisteringly fast Wi-Fi have been given a boost by a team of European researchers’ work on miniscule microchips.

The work, led by Belgian-based nanotechnology research group IMEC, has proved the potential for 45 nm-scale chips to be used for RF applications that require high speed and low power consumption.

The CMOS chips, made using a 45 nm circuit etching process, are the newest and smallest generation of integrated circuits to be produced commercially and are already found in some ultra-high-performance computer processors.
“However, the evaluation of successive generations of CMOS chips for analog and RF applications typically tends to lag behind their use for digital processing, despite the important applications for them,” said Stefaan Decoutere, an electrical engineer at IMEC.

That is where a team of researchers from IMEC, Infineon Technologies, Philips Electronics, Sweden’s Chalmers University and Belgium’s KUL (Catholic University Leuven) stepped in.

Led by Decoutere, the researchers carried out validation, modelling and optimisation work on 45 nm CMOS for RF and analog applications, creating functioning sub-circuits using the technology and proving its potential for ultra-wideband wireless communications at frequencies above 60 GHz.

The research was partially funded by the European Union in the NANO-RF project.

“When we started our research three years ago we did not know what the technology would look like, not least because there were many challenges to overcome when it came to improving upon the performance of the 90 nm generation of CMOS,” Decoutere said.

However, scaling down CMOS chips remains crucial to ongoing improvements in RF and analog technologies. That echoes chip scaling in the digital domain where Moore’s Law predicts that the number of transistors that can be placed inexpensively on an integrated circuit will lead to a doubling of computer processing power about every two years.
For example, different wireless technologies, from Wi-Fi and Bluetooth to the UMTS and CDMA mobile standards, mean that smart phones have to have a variety of radios in them to pick up the different signals in different frequency ranges.
Smaller, faster and less power-hungry chips mean that more radios can be packed into the same sized device, increasing functionality and performance while extending battery life.

In Decoutere’s view, mobile phones and similar communications devices are likely to gain most from work on 45 nm CMOS. However, the NANO-RF team also proved the potential for 45 nm CMOS to be an enabling technology for the next generation of wireless communications.

One of the team’s key breakthroughs was the validation of 45 nm CMOS for radio communications at the 60 GHz frequency, a form of ultra-wideband Wi-Fi that will enable high-definition video to be streamed at speeds of several gigabits per second over short distances.

“We showed that, in the long run, 45 nm CMOS is the technology of choice for 60 GHz radio, compared to the silicon germanium (SiGe) transistor technology that was demonstrated by IBM a few years ago,” Decoutere said.

“The key difference with our approach is that the CMOS is the high-speed device, whereas with SiGe the high-speed device must be added to the CMOS — that adds to the complexity and increases the cost.”

IMEC presented some of the results of the 45 nm CMOS research at the International Solid State Circuits Conference in San Francisco, unveiling a 60 GHz front-end receive chain, phase locked loop and power amplifier, among other devices.
The Belgian group envisages those building blocks leading to commercial 60 GHz radios by 2010 that rely solely on CMOS.

At higher frequencies, project partner Infineon investigated whether 45 nm CMOS could be used for emerging 77 GHz in-car radar and collision-avoidance systems that promise to improve road safety.

That application, as well as others, such as medical imaging, air traffic control and industrial process control, is being explored by Infineon and IMEC as part of the EU-funded DOTFIVE project.

As new applications emerge and performance demands increase, further CMOS scaling will be required. That, in turn, is likely to necessitate the adoption of different chip production techniques from the planar, or layer-by-layer, manufacturing process currently used to make most CMOS chips.

With that in mind, Decoutere’s team carried out research on 45 nm CMOS built using FinFETs, a type of multigate field effect transistor in which the conducting channel is wrapped around a thin silicon fin.

“To our knowledge, the consortium has created the first complex sub-circuits in FinFET CMOS technology, proving that it is a viable contender [to planar CMOS] for RF applications beyond 45 nm,” Decoutere said.

“The findings are very important to our industrial partners in preparing for future scaling demands.”

Having optimised 45 nm CMOS for RF applications, the team behind the NANO-RF project are now turning their sights to successive generations of chips.

“We are now looking to 22 nm, skipping the 32 nm scale which is just a scaling down of the work we have already done,” Decoutere said.

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